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[Embeded-SCM Develop] JTAG仿真器CPLD

Description: JTAG仿真器CPLD -JTAG Emulator CPLD
Platform: | Size: 345088 | Author: 李秉 | Hits:

[VHDL-FPGA-Verilog] jtag.tar

Description:
Platform: | Size: 338944 | Author: dc | Hits:

[VHDL-FPGA-Verilog] jtag

Description: jtag技术规范，以及标准的并口jtag下载电缆的资料-JTAG technical specifications, as well as the standard parallel port JTAG download cable data
Platform: | Size: 12288 | Author: 张恒 | Hits:

[DSP program] 45bf7d9d-2883-4d8f-96f5-4e97693a41f3

Description: 我的一个有关jtag的程序代码,发上来看看,看个有帮助.-My a JTAG program code, the table look at a watch has to help.
Platform: | Size: 286720 | Author: 甘同同 | Hits:

[ARM-PowerPC-ColdFire-MIPS] jtag_logic

Description: Serial/Parallel converter, interfacing JTAG chain with FTDI FT245BM
Platform: | Size: 2048 | Author: yuxiaoqin | Hits:

[VHDL-FPGA-Verilog] msp430_jtag_nios

Description: 将msp430与使用nios的fpga相连，将fpga作为msp430的jtag使用。其中用到了nios内的多种接口以及dma操作-The MSP430 with the use of the Nios FPGA connected to the FPGA as the MSP430 JTAG to use. Which used the Nios multiple interfaces and dma operation
Platform: | Size: 56320 | Author: danielmu | Hits:

[VHDL-FPGA-Verilog] USB_jtag

Description: 用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机。-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine.
Platform: | Size: 1571840 | Author: 霍飘摇 | Hits:

[ARM-PowerPC-ColdFire-MIPS] demo

Description: Flex chip implementation File: UP2FLEX JTAG jumper settings: down, down, up, up Input: Reset - FLEX_PB1 Input n - FLEX_SW switches 1 to 8 Output: Countdown - two 7-segment LEDs. Done light - decimal point on Digit1. Operation: Setup the binary input n number. Press the Reset switch. See the countdown from n down to 0 on the 7-segment LEDs. Done light lit when program terminates.-Flex chip implementation File: UP2FLEX JTAG jumper settings: down, down, up, up Input: Reset- FLEX_PB1 Input n- FLEX_SW switches 1 to 8 Output: Countdown- two 7-segment LEDs. Done light- decimal point on Digit1. Operation: Setup the binary input n number. Press the Reset switch. See the countdown from n down to 0 on the 7-segment LEDs. Done light lit when program terminates.
Platform: | Size: 107520 | Author: james | Hits:

[ARM-PowerPC-ColdFire-MIPS] ARM7-ARM9-JTAG-emulator

Description: ARM7ARM9的jtag仿真器，用于JTAG在线仿真-ARM7ARM9 the JTAG emulator
Platform: | Size: 792576 | Author: 周谦 | Hits:

[Other] JTAG-TAP

Description: JTAG TAP controller verilog source code
Platform: | Size: 5120 | Author: kdlee | Hits:

[VHDL-FPGA-Verilog] 45561564

Description: 典型实例10.8 字符LCD接口的设计与实现 软件开发环境：ISE 7.1i 硬件开发环境：红色飓风II代－Xilinx版 1. 本实例控制开发板上面的LCD的显示； 2. 工程在\project文件夹里面 3. 源文件和管脚分配在\rtl文件夹里面 4. 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Typical examples of character LCD interface 10.8 The Design and Implementation of Software Development Environment: ISE 7.1i development environment hardware: Hurricane II on behalf of the red-Xilinx Edition 1. The above examples of the control board of the LCD display 2. Projects \ project folder inside 3. the distribution of the source file and pin in \ rtl folder inside 4. download files in \ download folder inside,. mcs file for the PROM mode download,. bit for the JTAG debugger to download the file.
Platform: | Size: 313344 | Author: 王磊 | Hits:

[ARM-PowerPC-ColdFire-MIPS] ug_virtual_jtag_design_example_2

Description: 包含两的关于Virtual JTAG的应用实例，可以为Virtual JTAG操作提供借鉴。-Contains two Virtual JTAG on the application, can provide reference Virtual JTAG operation.
Platform: | Size: 311296 | Author: youthl | Hits:

[ARM-PowerPC-ColdFire-MIPS] ug_virtual_jtag_design_example_1

Description: 包含两的关于Virtual JTAG的应用实例，可以为Virtual JTAG操作提供借鉴。-Contains two Virtual JTAG on the application, can provide reference Virtual JTAG operation.
Platform: | Size: 143360 | Author: youthl | Hits:

[Other] c73a2ceb-09a5-4366-83ea-78b08c6200eb

Description: jtag TAP控制状态机代码 verilog VHDL-jtag TAP state machine code
Platform: | Size: 2048 | Author: 张涛 | Hits:

[VHDL-FPGA-Verilog] JTAG

Description: actel FPGA JTAG电路 周立功开发-actel JTAG
Platform: | Size: 32768 | Author: pigeoon | Hits:

[OS program] jtag

Description: JTAG Tools is a software package which enables working with JTAG-aware (IEEE 1149.1) hardware devices (parts) and boards through JTAG adapter. This package has open and modular architecture with ability to write miscellaneous extensions (like board testers, flash memory programmers, and so on). JTAG Tools package is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for JTAG Tools. Please read COPYING file for more info. -JTAG Tools is a software package which enables working with JTAG-aware (IEEE 1149.1) hardware devices (parts) and boards through JTAG adapter. This package has open and modular architecture with ability to write miscellaneous extensions (like board testers, flash memory programmers, and so on). JTAG Tools package is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for JTAG Tools. Please read COPYING file for more info.
Platform: | Size: 957440 | Author: asdf | Hits:

[ARM-PowerPC-ColdFire-MIPS] JTAG

Description: 详细介绍FPGA的JTAG原理和应用,主要设计Xilinx的FPGA的JTAG设计和下载方式-XilinxFPGAJTAG
Platform: | Size: 3965952 | Author: lxb | Hits:

[VHDL-FPGA-Verilog] JTAG

Description: JTAG Verilog source code
Platform: | Size: 13312 | Author: austin | Hits:

[VHDL-FPGA-Verilog] jtag

Description: Fpga开发应用，jtag方面的源代码，VHDL-Fpga development and application, jtag in the source code, VHDL
Platform: | Size: 3072 | Author: 王刚 | Hits:

[VHDL-FPGA-Verilog] jtag

Description: verilog jtag源码及原理，还有debug模块。边界扫描等-verilog jtag source and principle, as well as debug module. Boundary-Scan, etc.
Platform: | Size: 10044416 | Author: jack | Hits:
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